XCP-ng
    • Categories
    • Recent
    • Tags
    • Popular
    • Users
    • Groups
    • Register
    • Login

    PCIe Pass-through lanes and lane performance

    Scheduled Pinned Locked Moved Compute
    5 Posts 3 Posters 56 Views 2 Watching
    Loading More Posts
    • Oldest to Newest
    • Newest to Oldest
    • Most Votes
    Reply
    • Reply as topic
    Log in to reply
    This topic has been deleted. Only users with topic management privileges can see it.
    • J Offline
      JamesG
      last edited by

      A curiosity here...

      I've got two (identical) hosts in a pool (2nd Gen Epyc).

      Host 1 has an NVidia Tesla P4 GPU passed-through to a VM.
      Host 2 has an Intel B50 Pro GPU passed-through to a VM.

      I've been attempting to get the Intel GPU running properly in a VM.

      The NVidia GPU is PCIe Gen3 x16.
      The Intel should be PCIe Gen5 x8, but should not have any issues running at PCIe Gen4 x8.

      The NVidia GPU shows up as PCIe Gen3 x16 lanes.
      The Intel GPU shows up as PCIe Gen1 x1 lane (and as such does not work).

      What determines how many of what generation PCIe lanes gets passed through? Is XCP-ng just not sorting out the Intel GPU properly?

      I'm pretty sure the BIOS settings are the same between the two hosts, but I'll see about doing a full comparison between the two.

      Thanks!

      James

      acebmxerA R 2 Replies Last reply Reply Quote 0
      • acebmxerA Offline
        acebmxer @JamesG
        last edited by

        @JamesG

        Are these GPUs installed in actual servers or consumer motherboards? If the later is the intel gpu in the top most pcie slot?

        J 1 Reply Last reply Reply Quote 0
        • J Offline
          JamesG @acebmxer
          last edited by

          @acebmxer Supermicro server systems. The Eypc CPU's have 128 lanes of PCIe Gen4. The cards are inserted into appropriate slots.

          I just updated the BIOS and BMC code on the server with the Intel GPU. I went through and re-enabled all the SR-IOV stuff and made sure ReBAR was enabled.

          Still, GPU-Z reports that a Windows guest with the Intel GPU passed-through is linked up with a single lane of PCIe gen 1.

          I suppose that could be cosmetic, however passing through the same Intel GPU to a Debian VM has issues when trying to initialize the card on boot and I can't get it to work there at all. It will at least do something in Windows.

          1 Reply Last reply Reply Quote 0
          • R Offline
            redakula @JamesG
            last edited by

            @JamesG

            The intel Arc GPUs have som weird internal pcie bridge setup that lspci shows only the top of so the actual speed is probably not x1...
            https://www.intel.com/content/www/us/en/support/articles/000094587/graphics.html

            J 1 Reply Last reply Reply Quote 1
            • J Offline
              JamesG @redakula
              last edited by

              @redakula

              First, thanks for chiming in. Second...I'll admit that I'm ignorant here. This is not an area that I have any real experience.

              The Intel doc reference (paraphrasing here) "magic lspci" options that will truly show you that the GPU isn't really running in Gen1x1 and that deeper down, its truly working as intended. I wish they would have just included the super-secret magic lspci options needed to show this is the case...But they didn't.

              The best I can see from lspci -vvxxxx is it still only shows Gen1x1

              00:08.0 VGA compatible controller: Intel Corporation Battlemage G21 [Intel Graphics] (prog-if 00 [VGA controller])
              	Subsystem: Intel Corporation Device 1114
              	Physical Slot: 8
              	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
              	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
              	Latency: 0
              	Interrupt: pin ? routed to IRQ 79
              	Region 0: Memory at f1000000 (64-bit, prefetchable) [size=16M]
              	Region 2: Memory at 400000000 (64-bit, prefetchable) [size=16G]
              	Expansion ROM at 000c0000 [disabled] [size=128K]
              	Capabilities: [40] Vendor Specific Information: Len=0c <?>
              	Capabilities: [70] Express (v2) Endpoint, IntMsgNum 0
              		DevCap:	MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
              			ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 0W TEE-IO-
              		DevCtl:	CorrErr- NonFatalErr- FatalErr- UnsupReq-
              			RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+
              			MaxPayload 128 bytes, MaxReadReq 512 bytes
              		DevSta:	CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
              		LnkCap:	Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
              			ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
              		LnkCtl:	ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk-
              			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
              		LnkSta:	Speed 2.5GT/s, Width x1
              			TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
              		DevCap2: Completion Timeout: Range B, TimeoutDis+ NROPrPrP- LTR+
              			 10BitTagComp+ 10BitTagReq+ OBFF Not Supported, ExtFmt+ EETLPPrefix-
              			 EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
              			 FRS- TPHComp- ExtTPHComp-
              			 AtomicOpsCap: 32bit- 64bit- 128bitCAS-
              		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
              			 AtomicOpsCtl: ReqEn-
              			 IDOReq- IDOCompl- LTR- EmergencyPowerReductionReq-
              			 10BitTagReq- OBFF Disabled, EETLPPrefixBlk-
              		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete- EqualizationPhase1-
              			 EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
              			 Retimer- 2Retimers- CrosslinkRes: unsupported
              	Capabilities: [ac] MSI: Enable+ Count=1/1 Maskable- 64bit+
              		Address: 00000000feed7000  Data: 0700
              	Capabilities: [d0] Power Management version 3
              		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
              		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
              	Kernel driver in use: xe
              	Kernel modules: xe
              00: 86 80 12 e2 07 04 10 00 00 00 00 03 00 00 00 00
              10: 0c 00 00 f1 00 00 00 00 0c 00 00 00 04 00 00 00
              20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 14 11
              30: 00 00 00 f2 40 00 00 00 00 00 00 00 ff 00 00 00
              40: 09 70 0c 01 0b 00 00 00 00 00 00 00 00 00 00 00
              50: c0 f9 00 00 00 00 00 00 00 40 00 00 00 00 00 00
              60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
              70: 10 ac 02 00 e1 8f 00 00 10 29 00 00 11 0c 40 00
              80: 00 00 11 00 00 00 00 00 00 00 00 00 00 00 00 00
              90: 00 00 00 00 12 08 13 00 00 00 00 00 02 00 00 00
              a0: 01 00 00 00 00 00 00 00 00 00 00 00 05 d0 81 00
              b0: 00 70 ed fe 00 00 00 00 00 07 00 00 00 00 00 00
              c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
              d0: 01 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00
              e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
              f0: c7 21 80 ff 03 00 00 00 00 00 00 00 00 00 00 00
              
              

              When I ask the system what it thinks the capabilities are, again I get Gen1x1:

              cat /sys/bus/pci/devices/0000:00:08.0/current_link_speed
              2.5 GT/s PCIe
              cat /sys/bus/pci/devices/0000:00:08.0/current_link_width
              1
              cat /sys/bus/pci/devices/0000:00:08.0/max_link_speed
              2.5 GT/s PCIe
              cat /sys/bus/pci/devices/0000:00:08.0/max_link_width
              1

              I know I'm a bit out in uncharted territory here. I don't think XCP-ng supports ReBAR via pass-through (I think that's on the road-map for XenServer9 and maybe XCP-ng 9 as well), current gen GPUs all want ReBAR support, Intel GPU's are in a mostly experimental/developmental mode and might be having a murky future anyway...

              Anyway...From my completely uninformed and ignorant position, it doesn't look like it's negotiating PCIe properly through XCP-ng.

              1 Reply Last reply Reply Quote 0

              Hello! It looks like you're interested in this conversation, but you don't have an account yet.

              Getting fed up of having to scroll through the same posts each visit? When you register for an account, you'll always come back to exactly where you were before, and choose to be notified of new replies (either via email, or push notification). You'll also be able to save bookmarks and upvote posts to show your appreciation to other community members.

              With your input, this post could be even better 💗

              Register Login
              • First post
                Last post